It’s the back-end that needs work as system-level considerations begin to dominate design, Qualcomm’s vice president of engineering said at DAC.
Cooperation in key verticals such as automotive and changes for DAC as well as global conference outreach underpin EDA association's move.
Cadence Design Systems has made enhancements to its Virtuoso mixed-signal layout tool at both the system-level and nanometer-design levels for its 18.1 release.
Simulation suite automates the largely manual process of validating more than 25 SerDes protocols.
If current market trends persist, shortages in wafers are likely to follow, hurting the ability of some companies to ship silicon and boost the prices for those who can.
Read some edited highlights from the most successful companies in Mentor's 2017 Technology Leadership Awards.
Altium has rewritten its PCB-design software to improve graphics performance and provide the opportunity to port to non-Windows operating systems such as OS X.
Machine learning is among the focus topics at next year's Symposia on VLSI Technology & Circuits in Honolulu, which has issued its call for papers.
An emulator that extends the reach of hardware acceleration into the world of multiphysics analysis could result from the merger of Siemens PLM Software with Mentor.
TSMC encapsulated the multiple chips assembled on a 1200mm2 silicon substrate to cut the chance of damage from warping with the company's CoWoS2 SiP technology.
View All Sponsors