How hardware emulation helps drones take flight
In an exclusive interview, Lauro Rizzatti discusses the increasing verification challenges for drone SoCs with Bo Shen, founder of fabless specialist Artosyn.
SoC
Taking risk out of software-driven networking SoCs
How virtualization and integration with hardware testers are enabling networking SoCs in the billion-gate era.
Enabling FPGA prototyping of large ASIC and SoC designs
How tool parallelism, automatic partitioning, deep debug memories and time domain multiplexing eases FPGA prototyping of large ASIC and SoC designs
It’s time to embrace objective-driven verification
How Wall Street's vastly resourced IT teams already point the way to cheaper, faster and more efficient verification by putting goals not tools first.
Using HAPS to streamline IP to SoC integration
The HAPS prototyping system can help designers integrate IP into SoCs more quickly.
Think like designers to fill the SoC verification gap
Build tools around the dataflows and control systems engineers model to address verification challenges posed by burgeoning complexity and low power.
Knock down the wall to SoC integration
SoC integration can be accelerated by using virtualization to make the benefits of emulation more accessible to both hardware and software engineers.
IP-to-SoC prototyping demands consistency
Many problems arise during the IP-to-SoC phase of FPGA-based prototyping due to the mix-and-match nature of the prototypes not the actual designs.
Improving SoC productivity through automatic design rule waiver processing for legacy IP
You can waive some physical verification errors related to legacy IP found in foundry DRC checks. Knowing which has involved lengthy manual analysis. TSMC is enhancing the process with automation.
The Shift Left: how virtual prototyping reduces risk
The business case behind how virtual prototyping speeds development, improves hardware and software quality, and improves ROI.
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